In power supply devices, there may be a case in which direct current to direct current (DC-DC) converters are used to decrease a voltage. For example, with battery chargers for mobile phones or alternating current (AC) adapters for notebook computers, an input alternating voltage of 100 V is converted to a DC voltage and, then, the DC voltage is decreased by the DC-DC converter and electrical power is supplied.
In particular, in power supply devices, such as battery chargers for mobile phones or AC adapters for personal computers, in which an input voltage is high and an output voltage is low, isolated forward converters may sometimes be used as DC-DC converters.
However, in circuits of single ended forward converters, because winding wires for releasing energy are provided, a great loss occurs in transformers. Accordingly, to reduce a loss of the transformers, double ended forward circuits in which two Field Effect Transistors (FETs) functioning as switching devices are arranged in the main transformers may sometimes be used. When the double ended forward circuits are used, because the winding wires for releasing energy are not provided, the loss of transformers can be reduced. Furthermore, with the power supply devices that use the double ended forward circuits, in order to improve the efficiency, synchronous rectifiers are connected, in parallel, to a secondary side diode.
FIG. 17 is a schematic diagram illustrating an example of a double ended forward circuit. In the following, a description will be given of the transition of the flow of electricity after the state in which switches 901 to 903 are turned on and the FET switch 904 is turned off.
When the FET switches 901 to 903 are turned on and the FET switch 904 is turned off, as illustrated by a dotted line 921, electricity flows via the switch 901 and the switch 902. Consequently, an induced current is generated and, as illustrated by a dotted line 923, electricity flows via the FET switch 903. The electricity is accumulated in a condenser and is output outside.
Then, by turning off the FET switches 901 to 903, electricity flows via a diode 911 and a diode 912 due to the energy accumulated in a primary coil, as illustrated by a dashed line 922. At this time, due to the energy accumulated in a secondary side choke coil, electricity flows via a diode 914 and the condenser. At this time, because the FET switch 904 is still in the off state, on the secondary side, electricity flows via the diode 914 as illustrated by a two-dot chain line 924. Furthermore, an induced current is generated due to the electricity flowing in the primary side coil and thus electricity flows. Because the flow direction of this electricity is the same direction as that illustrated by the two-dot chain line 924, which does not prevent the electricity flowing on the secondary side. However, in this state, a loss of electricity occurs when electricity flows via the diode 914. Accordingly, by turning on the FET switch 904 and electricity is made to flow via the FET switch 904. By doing so, because the electricity flows without passing through the diode 914, a loss is reduced.
At this point, if the FET switch 904 is turned on when the switch 901 and the switch 902 are in the on state, the drain current flows through both switches and thus a short circuit occurs. Accordingly, the FET switch 904 needs to be turned on after the switch 901 and the FET switch 902 are turned off.
Then, the switch 901 and the FET switch 902 are to be turned on; however, when the FET switches 901 and 902 and the FET switch 904 are simultaneously turned on, i.e., when drain current simultaneously flows in the FET switches 901 902 and the FET switch 904, a short circuit occurs. Accordingly, to prevent the short circuit, the FET switch 904 is turned off before the switch 901 and the FET switch 902 are turned on and then the FET switches 901 to 903 are turned on. In this case, if the FET switch 904 is turned off, electricity flows as illustrated by the two-dot chain line 924. Thereafter, because the FET switches 901 to 903 are turned on, electricity flows as illustrated by the dotted line 923.
Here, in FIG. 17, in order to easy to understand, a diode 913 and the diode 914 are arranged independent of the FET switch 903 and the FET switch 904. However, in general, a parasitic diode is installed inside each of the FET switch 903 and the FET switch 904 that are FET switches and, in practice, there may be a case in which the diode 913 and the diode 914 are not installed.
With the DC-DC converter that uses the double ended forward circuit illustrated in FIG. 17, if all of the FET switches 901 to 904 are in the off state, electricity flows via the diode 914 as illustrated by the two-dot chain line 924. If electricity flows via the diode 914 in this way, a loss of electricity occurs in the diode 914. For example, an electricity loss of 1 V occurs in both ends of the diode 914. Accordingly, it is preferable to shorten the time during which electricity flows into the diode 914. However, as described above, because a short circuit occurs when the FET switches 901 and 902 and the FET switch 904 are simultaneously turned on, a switch timing between the FET switch 904 and the FET switches 901 and 902 needs to differ. In this way, the time during which the drain current does not flow both the FET switch 904 and the FET switches 901 and 902 is referred to as a dead time. Because electricity flows via the diode during the dead time, a loss occurs. Furthermore, the dead time becomes the longest when no load is applied to a power supply. Accordingly, with the conventional power supply device, in order to reduce a loss as much as possible, a dead time at the time of no load is set to the minimum.
Furthermore, for DC-DC converters, a conventional technology that suppresses, when an output voltage becomes large, a rise in an output voltage by extending conduction period of a body diode is proposed. Furthermore, for DC-DC converters that alternately turn switches connected in series, a conventional technology that adjusts, in order to prevent through current, the switch timing when switches are turned on is adjusted in accordance with the property of the switches is proposed.
Patent Document 1: Japanese Laid-open Patent Publication No. 2007-151271
Patent Document 2: Japanese Laid-open Patent Publication No. 2011-199972
However, if a load current of a power supply becomes large, a drain current applied to each of FET switches that function as switching devices is increased and the interval of the FET switches to be turned on or off is increased. Accordingly, as with the conventional technology, if a dead time at the time of no load is set to the minimum, the dead time becomes long at the time of high current and thus a loss of electricity is increased.
FIG. 18 is a schematic diagram illustrating expansion of dead time when a high current flows. A graph 961 is a graph that represents a gate voltage of the FET switch 901 illustrated in FIG. 17. A graph 962 is a graph that represents a drain voltage of the FET switch 901. A graph 963 is a graph that represents a gate voltage of the FET switch 904 illustrated in FIG. 17. A graph 964 is a graph that represents a drain voltage of the FET switch 904. It is assumed that the FET switches 901 to 903 are simultaneously turned on or off. Furthermore, for the graphs 961 and 962, when an output is High, the state becomes in the on state, whereas, when an output is Low, the state becomes in the off state. Furthermore, it is assumed that, for the FET switches 901 to 904, if a drain voltage drops, a drain current flows.
At this time, the DC-DC converter is adjusted such that a dead time becomes the minimum when no load is applied and, as indicated by the solid lines illustrated in graphs 962 and 964, at a timing 941, the drain current of the FET switch 904 does not flow and the drain current of the FET switch 901 starts to flow. Furthermore, at a timing 942, the drain current of the FET switch 901 does not flow and the drain current of the FET switch 904 starts to flow.
However, if the drain current becomes large, the interval of the FET switches 901 and 904 to be turned on or off is increased as indicated by a dotted lines 931 to 934. Consequently, at a timing 943, the drain current of the FET switch 904 does not flow and a dead time is expanded as illustrated by a time period 951. Furthermore, at a timing 944, the drain current of the FET switch 901 does not flow and a dead time is expanded as illustrated by a time period 952.
Furthermore, with the conventional technology that changes conduction period of a body diode, shortening of a dead time is not considered; therefore, it is difficult to suppress a loss of electricity. Furthermore, with the conventional technology that adjusts the timing of a switch to be turned on in accordance with the property of the switch, a change in a dead time due to an increase in a current is not considered; therefore, it is also difficult to suppress a loss of electricity.